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Electronic Dummy Load

An electronic dummy load is constructed from "junk box" parts (tested up to 12V 5A).

Construction of DIY power supplies necessitates a method of testing not involving hooking-up a "real" circuit/project/load, which if something is not correct could lead to costly component burn-out etc. A dummy load is just such a device that is used to simulate an electrical load (1).

In terms of radio and audio circuits, a dummy load has specific requirements in each case (to match the antenna or loudspeakers to be used respectively). However, the dummy load described here deals with test loading power supply and similar circuits (eg power supplies [linear and switched-mode], batteries, solar cells, generators etc).

In the simplest form, such a dummy load can just be a suitable resistor (rated for the expected current/voltage and power dissipation). However, a resistor (those which are specifically manufactured for such a purpose are called power resistors) only allows a single load current. Although there are variable power resistors and or you could purchase a number of resistors with different values.

However, since power resistors are relatively expensive, an electronic circuit that can provide a variable load, enabling the load current to be set and varied within a defined range, is more desirable. Just such a circuit, and even better DIY made from "junkbox" parts, is described by Dave Jones (2).

Circuit Simulation

The video below shows a simulation of the circuit utilising both 5V and 12V supply rails for the op-amps with a range of voltages supplying the mosfet (i.e., simulating PSU "under test"). This simulation assists in determining likely response of circuit components/values under the test conditions. Scroll down for further explaination of circuit operation.

The circuit simulation showed that with a LA6358N (a dual op-amp package with similar specifications to LM324 - the LA6358N's were scrouged from an a scrapped DVD player) a 12V supply rail and 1:1 voltage divider (R1 and R2 = 10K) would enable ~5A to be supplied via the IRF540N. A 0-5A test range for the electronic dummy load is more than sufficient for my projected uses. An increased range could be achieved if further IRF540N's were connected in parallel. The IRF540N is a n-channel enhancement mode mosfet with a low Vgs threshold (max 4V), max Vgs ±20V, Ddss 100V, Id 33A (and easily avaiable from ebay).

Using 12V as the op-amp supply rail is also convenient as a 12V 200mA wall-wart power supply was conveniently available from a disused Uniden phone charger, meaning a step-down voltage regulator etc was not necessary. 12V at 5A exceeds the max power dissipation of the IRF540A (130W), so a relatively large heat sink and a cooling fan were included (both scrouged from an old laptop).

Circuit Operation

Central to understanding the operation of the circuit is knowledge of how operational amplifiers (op-amps) function. An excellent introduction to op-amps (avoiding "un-necessary" mathematics and giving a functional, practical awareness) is given by Dave Jones (3). Of the two practical "rules" for understanding op-amps the "op-amp tries to keep the inputs the same voltage" is central to understanding the electronic dummy load circuit. The "inputs" here refers to the non-inverting and inverting inputs of the op-amp.

The second major component of the circuit is the n-channel (enhancement mode) mosfet. A google search will give many sites explaining mosfet operation, typical advise is to think of a mosfet as a variable resistor, where the gate-source voltage controls the drain-source resistance. The enhancement mode (as opposed to the depletion mode variety) means the mosfet is "off" when the gate-source voltage is zero (or more correctly below the Vgs threshold value, which for the IRF540N is between 2 an 4 volts from the datasheet).

Therefore, the basic operation of the circuit involves varying the input voltage on the gate of the IRF540N to in effect vary the "resistance" of the load circuit imposed on the PSU supply being tested, and therefore the current drawn. Resistor R3 being one (1) ohm provides a convenient load/sense value so that the voltage drop across the 1 ohm (displayed via cheaply available LED Digital Panel Voltmeter) can be read as amps.

Instead of having a high wattage 1 ohm resistor (to handle the expected power dissipation) which is relatively expensive, 10 x 10 ohm (1W) resistors are used in parallel. This is not only cheaper because using 1W resistors (and likely more readily available in the "junk" box), but the expected variability in the tolerance (±10% in this case) can be expected to "average out" giving a likely "precise" 1 ohm desired value.

The op-amp is used to supply the gate voltage to the n-channel mosfet (set via the potentiometer and feedback from the sense resistor) as the current supplied by the mosfet is related to both Vgs and Vds, and the ability of the PSU under test to supply the current at the PSU under test supply voltage. Since the load/sense resistor is 1ohm, and this is connected as feedback to the inverting input of the mosfet, whatever voltage is input to the non-inverting input of the op-amp the "op-amp tries to keep the inputs the same voltage" and hence the op-amp output alters (and therefore voltage at the mosfet gate) to acheive this voltage at the inverting input. Therefore, if 1V is input at the op-amp non-inverting input, the op-amp will "arrange" (via Vgs and the mosfet) to have 1V at the inverting input, and hence 1V across the R3 (1 ohm), therefore 1amp.

Calibration

As previously mentioned, 10 x 10 ohm (1W) resistors are used in parallel instead of a single 1 ohm high wattage resistor (suitably specified for expected power dissipation). Therefore, the expected variability in the tolerance (±10% in this case) can be expected to "average out" giving a likely "precise" 1 ohm desired value. Within the tolerance of the DMM I had available this appeared to be the case. See the "Testing/Experimental Results" Section for further details.

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  • Dummy Load SchematicDummy Load Schematic

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    Dummy Load Schematic

  • Electronic Dummy Load Schematic

  • Dummy Load SchematicDummy Load Schematic

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    Electronic Dummy Load Schematic v2 (with opamp compensation network)

  • Electronic Dummy Load Schematic v2 (with opamp compensation network)

This project did not require a PCB. The construction was done using copper clad prototyping board. Veroboard diagrammatic layout shown below.

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  • Electronic Dummy Load VeroboardElectronic Dummy Load Veroboard

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    Electronic Dummy Load Veroboard layout

  • Electronic Dummy Load Veroboard layout

  • Electronic Dummy Load Veroboard with ComponentsElectronic Dummy Load Veroboard with Components

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    Electronic Dummy Load Veroboard with Components

  • Electronic Dummy Load Veroboard with Components

Qty Schematic Part-Reference Value Notes
Resistors
1R1, R210K1/4W, 10% 
1R35601/4W, 10% 
1R4 - R14101W, 10% 
1RV120KPotentiometer
Diodes
1D1Red LED 
Integrated Circuits
1U1LA6358NDual Op-Amp 
Miscellaeous
1 fan12V fan
1Q1IRF540NMosfet
2 MetersMini DC 0V To 99.9V LED Digital Panel Voltmeter  
Description Downloads
Electronic Dummy Load Bill of Materials Text File Download

Graph 1 and 2 display the results of checking the three digit Mini DC 0V To 99.9V LED Digital Panel Voltmeter display's used for output of volts and amps by the Electronic Dummy Load. The difficulty being that the range of the three digit LED voltmeter display's only allowed a single digit in the decimal place. It was found that 0.1 needed to be added to the actual displayed reading (volts or amps) to match the value recorded simultaneously by a DMM (assuming the DMM was the more accurate device). Also, the reading on the three-digit display (for volts and amps) is ±0.05

  • Graph 1: Calibration - volts display

    Electronic Dummy Load CalibrationElectronic Dummy Load Calibration

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    Electronic Dummy Load Calibration

  • Graph 2: Calibration - amps display

    Electronic Dummy Load CalibrationElectronic Dummy Load Calibration

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    Electronic Dummy Load Calibration

The final constructed Electronic Dummy Load was used to test the various PSU's I had available (results shown in Graph 3) including the salavaged PC supply that was converted to a Lab PSU.

Graph 3 also shows the results of "manually" load testing two of the PSU's using 5W power resistors (various values salavaged from old TV sets). The results of these "manual" tests correlate closely with the results obtained by the Electronic Dummy Load. This shows the relatively good precision/accuracy of the Electronic Dummy Load, which is much more convenient for load testing compared to using resistors and DMM's.

  • Graph 3: Load test results of various PSU's

    Electronic Dummy Load - Testing PSUsElectronic Dummy Load - Testing PSUs

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    Electronic Dummy Load - Testing PSUs

Graph 4 shows the results of measuring the temperature of the MOSFET within the constructed electronic dummy load versus selected load current at two voltages. The temperature was recorded with a digital thermometer based upon a DS18S20 and a PIC microcontroller. The temperature probe was placed directly on the MOSFET. This demonstrates that the size of heat sink and fan used in the construction are suitable (and that if the project is constructed with a view to testing relatively high amps and or voltages, suitable heat sinking for the MOSFET is critical).

  • Graph 4: MOSFET temperature versus load

    Electronic Dummy Load - MOSFET temperature vs loadElectronic Dummy Load - MOSFET temperature vs load

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    Electronic Dummy Load - MOSFET temperature vs load

This project involves few components and was constructed on veroboard, so is relatively straight forward.

Note that the actual component values were selected to enable relatively large currents to be tested. This meant the LED Digital Panel Voltmeters used would have insufficent resolution at lower amps. Therefore, "test points" were provided on the enclosure to enable connection of an external DMM to act as the display device.

The use of the wall-wart power supply makes the project relatively safe and simplifies construction.

The actual layout of the components, front panel, enclosure details etc depend upon the actual parts used. Since these are likely to be scrouged from dis-used/junked electronic products, I didn't detail the exact steps taken, as other's components likely not match what I had available.

The enclosure was constructed from 3mm thick perspex cut to the appropriate dimensions.

After construction/soldering of the components on the veroboard, initial testing showed no output by the circuit. After much head scratching, checking circuit layout again and again, the dreaded "cold solder joint" was discovered to be the problem (sigh). Using old scrouged components and tarnished surfaces can be a problem with the actual soldering.

An appropriate heat sink for the MOSFET is crucial if relatively high currents and voltages are to be tested - see the Testing/Experimental Results Section for tests conducted at 5V and 12V with load of 0 to 3A.

Op-Amp Oscillation

It was found that the output of the op-amp (and hence the voltage/current through the mosfet) started to oscillate when the potentiometer selected the equivalent of greater than ~0.2A as a "load current" (see following video). A compensation network (R11, R12 and C1 in the second schematic) was included following advise found here (4). As stated in a Texas Instruments application note on stability analysis of op-amps (5) "Once feedback is applied to the op amp, it is possible for the op-amp circuit to become unstable" and "the only absolutely stable internally compensated opamp is the one lying on the workbench without power applied!" Not being a EE, not entirely clear how the compensation network operates (my crude understanding is a sort of by-pass filter to ensure that the negative feedback doesn't become positive feedback due to poor phase response). I started with the values for R11, R12 and C1 in the second schematic as per (4). After some experimentation found a value of C1 increased to 3.3nF (with R1=100ohm, R2=560ohm) eliminated the oscillation.

The video below shows the op-amp output oscillating when the "output load" (i.e current through op-amp) exceeded ~0.2A (ramped from 0A to 0.3A, 20mV/Div, 2 uS/Div)

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