The video below shows a simulation of the circuit utilising both 5V and 12V supply rails for the op-amps with a range of voltages supplying the mosfet (i.e., simulating PSU "under test"). This simulation assists in determining likely response of circuit components/values under the test conditions. Scroll down for further explaination of circuit operation.
The circuit simulation showed that with a LA6358N (a dual op-amp package with similar specifications to LM324 - the LA6358N's were scrouged from an a scrapped DVD player) a 12V supply rail and 1:1 voltage divider (R1 and R2 = 10K) would enable ~5A to be supplied via the IRF540N. A 0-5A test range for the electronic dummy load is more than sufficient for my projected uses. An increased range could be achieved if further IRF540N's were connected in parallel. The IRF540N is a n-channel enhancement mode mosfet with a low Vgs threshold (max 4V), max Vgs ±20V, Ddss 100V, Id 33A (and easily avaiable from ebay).
Using 12V as the op-amp supply rail is also convenient as a 12V 200mA wall-wart power supply was conveniently available from a disused Uniden phone charger, meaning a step-down voltage regulator etc was not necessary. 12V at 5A exceeds the max power dissipation of the IRF540A (130W), so a relatively large heat sink and a cooling fan were included (both scrouged from an old laptop).
Central to understanding the operation of the circuit is knowledge of how operational amplifiers (op-amps) function. An excellent introduction to op-amps (avoiding "un-necessary" mathematics and giving a functional, practical awareness) is given by Dave Jones (3). Of the two practical "rules" for understanding op-amps the "op-amp tries to keep the inputs the same voltage" is central to understanding the electronic dummy load circuit. The "inputs" here refers to the non-inverting and inverting inputs of the op-amp.
The second major component of the circuit is the n-channel (enhancement mode) mosfet. A google search will give many sites explaining mosfet operation, typical advise is to think of a mosfet as a variable resistor, where the gate-source voltage controls the drain-source resistance. The enhancement mode (as opposed to the depletion mode variety) means the mosfet is "off" when the gate-source voltage is zero (or more correctly below the Vgs threshold value, which for the IRF540N is between 2 an 4 volts from the datasheet).
Therefore, the basic operation of the circuit involves varying the input voltage on the gate of the IRF540N to in effect vary the "resistance" of the load circuit imposed on the PSU supply being tested, and therefore the current drawn. Resistor R3 being one (1) ohm provides a convenient load/sense value so that the voltage drop across the 1 ohm (displayed via cheaply available LED Digital Panel Voltmeter) can be read as amps.
Instead of having a high wattage 1 ohm resistor (to handle the expected power dissipation) which is relatively expensive, 10 x 10 ohm (1W) resistors are used in parallel. This is not only cheaper because using 1W resistors (and likely more readily available in the "junk" box), but the expected variability in the tolerance (±10% in this case) can be expected to "average out" giving a likely "precise" 1 ohm desired value.
The op-amp is used to supply the gate voltage to the n-channel mosfet (set via the potentiometer and feedback from the sense resistor) as the current supplied by the mosfet is related to both Vgs and Vds, and the ability of the PSU under test to supply the current at the PSU under test supply voltage. Since the load/sense resistor is 1ohm, and this is connected as feedback to the inverting input of the mosfet, whatever voltage is input to the non-inverting input of the op-amp the "op-amp tries to keep the inputs the same voltage" and hence the op-amp output alters (and therefore voltage at the mosfet gate) to acheive this voltage at the inverting input. Therefore, if 1V is input at the op-amp non-inverting input, the op-amp will "arrange" (via Vgs and the mosfet) to have 1V at the inverting input, and hence 1V across the R3 (1 ohm), therefore 1amp.
As previously mentioned, 10 x 10 ohm (1W) resistors are used in parallel instead of a single 1 ohm high wattage resistor (suitably specified for expected power dissipation). Therefore, the expected variability in the tolerance (±10% in this case) can be expected to "average out" giving a likely "precise" 1 ohm desired value. Within the tolerance of the DMM I had available this appeared to be the case. See the "Testing/Experimental Results" Section for further details.